An 8 hour class with introduction to Xilinx's programmable logic devices, tool chain and VHDL basics.

The first 2 hour are dedicated to an introduction to programmable logic devices including CPLD and FPGA general concept, family features including CoolRunner-II, Spartan 3/AN, Virtex 4 and Virtex 5. The meaning and use of special features like DCM, DCI, Dual-Edge FF's, BlockRAM, dinamic reconfiguration and others. Interfacing to 5V logic and several application examples are the subject in the closing of this first part.

The next hour is about Xilinx's tool chain and ISE GUI interface, with an overview on all resources and website answer searching.

The 5 left hours are for VHDL basics and hands-on laboratories. The language coverage includes VHDL syntax, operators, source body, processes and state-machine. The class will learn enough to design a simple sequential circuit including counters, conditional logic and interfacing. The course has 7 lab exercises, including schematic & VHDL mixed design lab - usefull to help students to understand the meaning of a VHDL expression and how it is implemented.

Besides simulation is not covered in lessons it is shown by instructor in one lab exercise to improve students' knowledge about tools. The same happens when different ways of implementing a circuit are presented and the reports are read in the classroom to show the speed/resource differences.

The students will learn all necessary steps to be able to implement their own designs and to use the Xilinx's tools as well as how to use logic devices.

The first day is the same as the above one day training. The other two days are dedicated to some more advanced VHDL and a lot of hands-on exercises.

The additional VHDL coverage is about Component, Generate function and instantiation of device specific resources. Details on synchronous designs, constraints and high-speed design guidelines.

Students will design a simple CPU with an instruction set created by themselves and in the third day they will exercise with picoblaze implementation.

Although the first day seems to be more packed the hands-on activity in the next two days give to students the necessary familiar contact with ISE's tools and resources, extense VHDL programming and team design approach.

All lab exercises will be done in Spartan-3AN development boards where the students will learn the interfacing methods to external components such as memories and communication interfaces, including timing closure and voltage levels.